I mentioned in a previous post that I would delve a little deeper into what HP have done to optimise performance on the new 3PAR 7450. I was lucky to be able to catch up at the 3Par booth with Priyadarshi Prasad, who works in marketing for HP 3PAR. We took some time to talk about the new software features that have been implemented in the 3PAR code in order to optimise flash usage. There was also a great blogger Coffee Talk with David Scott (VP and GM of the HP Storage business) and Siamak Nazari (HP 3PAR Architect and HP Fellow) where we were able to dig into more detail. Siamak is passionate about the 3PAR platform and both knows his stuff and is prepared to explain it, as we learned from the 3PAR presentations at the first Tech Field Day at which 3PAR presented.
So what have HP done? Firstly there are some hardware changes; the 7450 system uses an 8-core Intel Xeon Sandy Bridge processor running at 2.3Ghz, compared to the previous 6-core 1.8Ghz model. Cache has been upgraded too, doubling from 64GB to 128GB for a four-node cluster. From a software perspective, some of the change include:
- Additional cache flush queue for flash. An extra queue has been added to separate the flushing of cache for HDD and SSD devices, meaning both can be optimised independently.
- Write I/O optimisation. The 3PAR design uses a 16KB block size for writing data to disk, irrespective of the amount of changed data within that 16KB block. Re-writing 16KB blocks on HDD systems isn’t a problem, however for flash devices, which have a finite lifetime, writing as little data as possible is best. So, the 3PAR code has been changed to perform fragmented writes – writing only 4KB changed sections of 16KB blocks. Presumably the additional metadata tracking required is why cache has also been increased. The write I/O optimisation also extends to disk failure recovery, with 32KB transfers rather than the existing 12KB block size.
- Additional multi-tenant support. This is achieved with the new feature of priority optimisation. In mixed workloads of small and large block sizes, large-block I/O requests are now split up and interleaved with the small requests to improve performance.
- Generation 4 ASIC. The custom ASIC used in the 3PAR platform continues to be developed and extended and used to deliver high performance features.
More detail on the enhancements can be found on the Coffee Talk briefing, which was recorded by Calvin Zito and is available on iTunes or on Calvin’s blog (post here). Overall the additional optimisation means a 4-node 7450 can deliver 554,000 IOPS at a latency of 0.7ms. This compares to an all-flash “non-optimised” 3PAR StoreServ 7400 equivalent, which achieved 300,000 IOPS at 1ms.
The underlying design of the 3PAR architecture always made is suitable for use with flash, due to the highly distributed nature of the way I/O is spread across all devices on all controllers. 3PAR StoreServ now ranges from the entry 7200 to the 10800 for large scale enterprise deployments. It’s clear HP are betting their storage business on the success of 3PAR by extending the range of opportunities and environments into which it can be deployed. The single platform provides greatly enhanced mobility for shifting workloads to the most suitable hardware. Having a single architecture and more importantly a single management interface for all devices regardless of capacity or performance needs will be extremely attractive to many customers. This is already indicated by the now $1B annual run rate of the 3PAR StoreServ business in HP, an 82% year on year annual growth to financial year 2Q2013.
With this announcement, HP has made life harder for the all-flash startups. In another post, I’ll look at the widening flash array landscape and exactly where we go from here. In the meantime, here’s a fun post from John Obeto, with David Scott cutting the ribbon on the new 7450 release – HP 3PAR StoreServer Ribbon Cutting.
- 3PAR continues to be HP storage cornerstone
- HP Storage bets on 3PAR
- Choosing between monolithic and modular architectures – Part II
- Deep Dive on HP 3PAR StoreServ 7450 all-flash array (ATSB, Calvin Zito)
- HP boxes clever in flash array fray with 3PAR 7450 (Computerweekly)
Disclaimer: HP paid for flights and accommodation for Chris Evans to attend HP Discover. However this does not imply a requirement to blog about the event and no editorial rights to any published content is provided.
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