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Flash Tiering – HP 3PAR Adaptive Cache

Flash Tiering – HP 3PAR Adaptive Cache

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I recently completed a white paper for HP on a new feature in the 3PAR StoreServ platform called Adaptive Cache.  In disk-based 3PAR systems, flash SSD devices can be used to augment the DRAM cache and act like a second level of memory tiering by cascading cached pages to flash rather than simply flushing them out.  The benefit is increased performance/throughput for the use of only a small amount of flash SSD storage.

HP aren’t the only company using this tiering technique and in fact we see EMC implementing this feature in VNX, NetApp caching in Data ONTAP and Nimble Storage using a variant of this way of using cache in their storage platform.  What we’re starting to see is the move towards tiering of flash in storage products just like any other permanent or semi-permanent storage medium.

I had a brief Twitter discussion on this subject earlier this year and I posited that we would see tiered flash within storage arrays.  Today we already see that with HP 3PAR (to continue our example) offering SLC, MLC and cMLC flash devices.  Where cost is a differentiating factor, it makes sense to look at the options of using the most appropriate flash technology.  Incidentally I heard that the larger “cMLC” devices offered by HP on the 3PAR platform don’t come with the same level of warranty, as the increase in capacity is achieved by using some of the over-provisioned capacity.  Now, whether that’s true or not, it does highlight that this kind of storage could be used where there isn’t a high degree of write activity (e.g. web farms) and the lifetime is less of an issue.

Another company offering a range of flash options is Tegile, who recently branched out into all-flash arrays but have a hybrid design that uses both HDD and flash and utilises ZFS (Zettabyte File System), the filesystem developed by Sun Microsystems.  I’ll talk about Tegile’s offerings in another post, however it’s relevant to point out that new architectures like Tegile Zebi arrays (presumably a play on words between zebibyte and zettabyte) can use flash options in more flexible and opportunistic ways.

The Architect’s View

Why is this important?  Well today, we may not think tiering flash is relevant, when the performance of a few SSDs can max out an Intel Xeon processor.  However we need to look 2/3/4/5 years into the future when processing power will be much quicker and flash storage won’t look nearly so good.  You can read the HP 3PAR Adaptive Cache Report online or watch Calvin Zito’s video demo.

For more information on Tegile, check out their website, or watch some of the Tech Field Day videos from a recent Storage Field Day.

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Copyright (c) 2009-2014 – Chris M Evans, first published on http://blog.architecting.it, do not reproduce without permission.




About Chris M Evans

Chris M Evans has worked in the technology industry since 1987, starting as a systems programmer on the IBM mainframe platform, while retaining an interest in storage. After working abroad, he co-founded an Internet-based music distribution company during the .com era, returning to consultancy in the new millennium. In 2009 Chris co-founded Langton Blue Ltd (www.langtonblue.com), a boutique consultancy firm focused on delivering business benefit through efficient technology deployments. Chris writes a popular blog at http://blog.architecting.it, attends many conferences and invitation-only events and can be found providing regular industry contributions through Twitter (@chrismevans) and other social media outlets.
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